As semiconductor feature sizes get smaller and smaller, the voltage level that low voltage, minimum geometry devices can withstand has decreased correspondingly. Because high voltage devices have to isolate the same voltage independent of the technology node, however, the area consumption of high-voltage devices compared to low voltage devices is steadily increasing. Thinner gate oxides and shorter channel lengths have reduced common supply voltages from the 5V and 3.3V seen a decade ago to 1.2V and below. The higher device density and faster performance of sub-micron processes have come at a cost of lower device breakdown voltages. High demand for small portable devices such as MP3 players have also increased the demand for circuits that can operate efficiently on a single battery cell.
Lower power supply voltages have posed a number of circuit design challenges and difficulties. One of these difficulties lies in the design of dense non-volatile memory. Very small feature sizes are required in order to economically fabricate and produce non-volatile memory devices having billions of memory cells on a single integrated circuit. Programming and erasing non-volatile memories, such as electrically erasable read only memory (EEPROM) and Flash memory, requires applying voltage levels higher than a typical minimum size sub-micron device can withstand. For example, write voltages of up to about 20V may be required in a process that only withstands a maximum voltage of about 2V. One solution to this problem has been to fabricate high voltage devices that can withstand the higher programming voltages and use these devices for memory array support circuitry, such as charge-pumps, level shifters and bit-line drivers, which must withstand these high voltages.
These high voltage devices come at a cost of thicker oxides and device areas that significantly exceed the device areas of minimum geometry low voltage devices. It is necessary to increase the physical dimensions of these high-voltage devices, as well as provide thicker gate oxides that will not break down or will not fail in the presence of these higher voltages. Incorporating these high voltage devices into high-density, non-volatile memories requires devoting a significant amount of silicon area to high voltage support circuitry, thereby limiting the maximum number of non-volatile memory cells that can be fabricated on a given integrated circuit.
In the field of non-volatile memories, what is needed are devices and methods of reducing the area devoted to high-voltage support circuitry.